Post by lockstepper on Feb 7, 2019 8:35:08 GMT
Hello everybody,
I am trying to enable Interrupts on Channel ATOM1_3 and Atom2_3 and make them visible outside of the GTM.
It only works succesful with the first channel. The ISR from the second channel will executed only once at startup and never again.
Even though, I can see the interrupt in the Channel Registers and in the Interrupt router the ATOM2_3 ISR is not executed. The Interrupt concentrator Module in GTM shows same configurations for both Channels.
The interrupts are not pending.
here are some code snippets
enum:
PWM2_Ch0_ISR_Priority =84
PWM2_Ch1_ISR_Priority =85
static const HandlerTable_t mS_PWMHandlerTable[2] =
{
{ &M_S16_CH0_HandlerEnable, &M_V_CH0_Handler, PWM2_Ch0_ISR_Priority, TRUE },
// BOOL is not used
{ &M_S16_CH1_HandlerEnable, &M_V_CH1_Handler, PWM2_Ch1_ISR_Priority, TRUE },
};
static S16 M_S16_CH0_HandlerEnable(U16 prio,
U16 coreID)
{
pS_GTM_SRC->GTM[0].ATOM[1][1].B.SRPN = prio;
pS_GTM_SRC->GTM[0].ATOM[1][1].B.TOS = coreID;
pS_GTM_SRC->GTM[0].ATOM[1][1].B.SRE = 1;
return 0;
}
static S16 M_S16_CH1_HandlerEnable(U16 prio,
U16 coreID)
{
pS_GTM_SRC->GTM[0].ATOM[2][1].B.SRPN = prio;
pS_GTM_SRC->GTM[0].ATOM[2][1].B.TOS = coreID;
pS_GTM_SRC->GTM[0].ATOM[2][1].B.SRE = 1;
return 0;
}
static void M_V_CH0_Handler(U8 args)
{
pS_GTM_SRC->GTM[0].ATOM[1][1].B.CLRR = 1;
// clear the interrupt in the interrupt router
K_V_CH0_Handler(0U);
// this functions puts only a flag to false
}
static void M_V_CH1_Handler(U8 args)
{
pS_GTM_SRC->GTM[0].ATOM[2][1].B.CLRR = 1;
K_V_CH1_Handler(1U);
}
I register the interrupts with:
K_V_VectorHandlerSet(mS_PWMHandlerTable[U16_DriverInstance].Priority, mS_PWMHandlerTable[U16_DriverInstance].Handler, (U8)U16_DriverInstance);
K_V_VectorEnable(mS_PWMHandlerTable[U16_DriverInstance].Priority, mS_PWMHandlerTable[U16_DriverInstance].EnableHandler);
PxRos takes over at this point.
Anybody knows why i cannot execute ISR's on more then one channel?
Best regards,
Torsten
THis picture shows all my configurations:
I am trying to enable Interrupts on Channel ATOM1_3 and Atom2_3 and make them visible outside of the GTM.
It only works succesful with the first channel. The ISR from the second channel will executed only once at startup and never again.
Even though, I can see the interrupt in the Channel Registers and in the Interrupt router the ATOM2_3 ISR is not executed. The Interrupt concentrator Module in GTM shows same configurations for both Channels.
The interrupts are not pending.
here are some code snippets
enum:
PWM2_Ch0_ISR_Priority =84
PWM2_Ch1_ISR_Priority =85
static const HandlerTable_t mS_PWMHandlerTable[2] =
{
{ &M_S16_CH0_HandlerEnable, &M_V_CH0_Handler, PWM2_Ch0_ISR_Priority, TRUE },
// BOOL is not used
{ &M_S16_CH1_HandlerEnable, &M_V_CH1_Handler, PWM2_Ch1_ISR_Priority, TRUE },
};
static S16 M_S16_CH0_HandlerEnable(U16 prio,
U16 coreID)
{
pS_GTM_SRC->GTM[0].ATOM[1][1].B.SRPN = prio;
pS_GTM_SRC->GTM[0].ATOM[1][1].B.TOS = coreID;
pS_GTM_SRC->GTM[0].ATOM[1][1].B.SRE = 1;
return 0;
}
static S16 M_S16_CH1_HandlerEnable(U16 prio,
U16 coreID)
{
pS_GTM_SRC->GTM[0].ATOM[2][1].B.SRPN = prio;
pS_GTM_SRC->GTM[0].ATOM[2][1].B.TOS = coreID;
pS_GTM_SRC->GTM[0].ATOM[2][1].B.SRE = 1;
return 0;
}
static void M_V_CH0_Handler(U8 args)
{
pS_GTM_SRC->GTM[0].ATOM[1][1].B.CLRR = 1;
// clear the interrupt in the interrupt router
K_V_CH0_Handler(0U);
// this functions puts only a flag to false
}
static void M_V_CH1_Handler(U8 args)
{
pS_GTM_SRC->GTM[0].ATOM[2][1].B.CLRR = 1;
K_V_CH1_Handler(1U);
}
I register the interrupts with:
K_V_VectorHandlerSet(mS_PWMHandlerTable[U16_DriverInstance].Priority, mS_PWMHandlerTable[U16_DriverInstance].Handler, (U8)U16_DriverInstance);
K_V_VectorEnable(mS_PWMHandlerTable[U16_DriverInstance].Priority, mS_PWMHandlerTable[U16_DriverInstance].EnableHandler);
PxRos takes over at this point.
Anybody knows why i cannot execute ISR's on more then one channel?
Best regards,
Torsten
THis picture shows all my configurations: